Article ID: 000085814 Content Type: Troubleshooting Last Reviewed: 02/06/2015

Why isn't the HPS_nRST(rst_pin_rst_n) driven LOW on cold reset?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The Cyclone® V and Arria® V Handbooks incorrectly state that HPS_nRST will be driven on some cold resets.

 

  • The HPS_nRST (rst_pin_rst_n) signal is only driven on Warm resets. 
  • It is not driven on Cold or POR resets.
Resolution

This documentation problem will be fixed in a future release of the Cyclone V and Arria V Handbooks.

Related Products

This article applies to 5 products

Cyclone® V SX SoC FPGA
Arria® V ST SoC FPGA
Arria® V SX SoC FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST SoC FPGA

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.