avl_readypulse low in some situations where it should not be expected. This occurs because of the way the Avalon interface works.
avl_readypulsing low during burst accesses.
- Increase the value of the MegaWizard™ parameter Command Queue Lookahead Depth. The controller uses an open page policy where it tries to keep banks open to avoid unnecessary precharge and activate cycles. Typically, it requires a Command Queue Lookahead Depth value of the number of pages to keep open simultaneously and at least 2 more for new commands entering the controller. Note that increasing this parameter will use more FPGA logic resources, and timing closure may be more challenging.
- Set the MegaWizard parameter Memory Parameters -> Mode Register 1 -> Memory additive CAS latency option to Disabled.
- In the DDR3 UniPHY controller\'s top level variation file, find the parameters
MAX_PENDING_RD_CMD. Change these values to 32 and regenerate the DDR3 controller.
- If using a half rate controller and Avalon burst accesses of size 1, to improve the efficiency of the controller, enable the burst merge option.
For more information on the Avalon interface, refer to the Avalon Interface Specifications.