Article ID: 000085800 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does the Fitter stage for a HardCopy revision run for a much longer time compared to the FPGA revision?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

In the Quartus® II software version 11.0 and earlier, when you compile a HardCopy® revision targeting either a HardCopy IV device or a HardCopy III device, the Fitter stage may run for a much longer time than the corresponding FPGA revision. This may happen when a design has high fan-out signals which are not assigned to global routing resources in the HardCopy revision. These signals may have been promoted to global routing resources in the FPGA revision but not in the HardCopy revision.

To verify if your design is affected, check Non-Global High Fan-Out Signals section in the Resource Section of the Fitter report. If you find any signal with a fanout greater than 10,000, promoting the signal to a global routing resource will likely reduce the Fitter time in the HardCopy revision. To assign a signal to a global routing resource, add the following assignment to your Quartus II Settings File (.qsf):

set_instance_assignment -name GLOBAL_SIGNAL ON -to <signal_name>

This behavior is scheduled to be addressed in a future version of the Quartus II software.

Related Products

This article applies to 3 products

HardCopy™ IV GX ASIC Devices
HardCopy™ IV E ASIC Devices
HardCopy™ III ASIC Devices

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