Article ID: 000085751 Content Type: Troubleshooting Last Reviewed: 07/08/2014

Which voltage supply powers the DEV_OE and DEV_CLR pins in Stratix III and Stratix IV devices?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

If the DEV_OE and/or DEV_CLR pin functions are enabled in designs targeting Stratix® III and Stratix IV devices, they are powered by the VCCPGM supply during configuration and user-mode.

Related Products

This article applies to 1 products

Stratix® IV GX FPGA

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