Article ID: 000085693 Content Type: Error Messages Last Reviewed: 07/27/2018

Error (11692): Design cannot be fitted into HSSI strip. 2 pma_aux_blocks under reference clocks set: dup_3ch_tx_pll_refclk[0]

Environment

  • Arria® V GX FPGA
  • Arria® V FPGAs and SoC FPGAs
  • Quartus® II Subscription Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description Due to a bug in the Quartus® II software version 13.1.3, you may see the Fitter error above when compiling for Arria® V devices.
    Resolution

    This is a known bug in Quartus II software version 13.1.3. To work around this, you can do either of the following

    Alt text to be used for img

    Need more help?

    Contact support

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.