Article ID: 000085680 Content Type: Troubleshooting Last Reviewed: 02/05/2013

Can MLABs support mixed data widths through emulation via the Quartus II software?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

No, mixed-width implementations are not supported for MLABs.

Page 4-6 of the Stratix®  III Device Handbook incorrectly states that MLABs can support mixed data widths through emulation via the Quartus II software. Also on page 4-10, it incorrectly states that the Quartus®  II software can implement mixed width memories in MLABs by using more than one MLAB.

If you generate a mixed-width FIFO in MLABs, the following error message will be generated:

Error: Cannot use Write port width with Read port width in DCFIFO megafunction. The width ratio should be a power of 2.

Error: Assertion error: Valid clear box generator not found or Errors encountered during clear box generation

Error: Can't elaborate user hierarchy <component hierarchy>

This problem is scheduled to be fixed in a future version of the documentation.

Related Products

This article applies to 1 products

Stratix® III FPGAs

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