Article ID: 000085550 Content Type: Error Messages Last Reviewed: 03/18/2013

Internal Error: Sub-system: CDB_SGATE, File: /quartus/db/cdb_sgate/cdb_sgate_wys_ram_block.cpp, Line: 475

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the Quartus® II software version 11.1 SP2 and earlier, you may see this error when compiling a design targeting a Cyclone® III device. This error may occur if the Auto RAM Block Balancing option is enabled in your Quartus II Settings File (.qsf):

set_global_assignment -name AUTO_RAM_BLOCK_BALANCING ON

Note that this is the default value for this assignment.

Resolution

To work around the problem, turn off the Auto RAM Block Balancing option using the assignment below in your .qsf:

set_global_assignment -name AUTO_RAM_BLOCK_BALANCING OFF

This problem is scheduled to be fixed in a future release of the Quartus II software.

Related Products

This article applies to 2 products

Cyclone® III FPGAs
Cyclone® III LS FPGA

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