Article ID: 000085417 Content Type: Troubleshooting Last Reviewed: 12/31/2013

Can I use the INPUT_TERMINATION .qsf assignment to assign an on-chip termination (OCT) to Transceiver REFCLK or Transceiver IO pins, in Stratix V, Arria V and Cyclone V devices?

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Description

No you cannot use the INPUT_TERMINATION assignment to assign an on-chip termination (OCT) to transceiver pins on Stratix® V, Arria® V and Cyclone® V devices. Instead, you must use one of the following qsf assignments :

XCVR_GT_IO_PIN_TERMINATION (Stratix V GT transceiver IO pins ony)

XCVR_IO_PIN_TERMINATION (transceiver IO pins)

XCVR_REFCLK_PIN_TERMINATION (REFCLK pins)

Refer to the Altera Transceiver PHY IP Core User Guide (PDF) for more information on how to use these assignments.
Note that if you use an INPUT_TERMINATION assignment on the transceiver pins, it will be ignored by the Quartus® II software and the default termination option will be assigned to these pins.

Related Products

This article applies to 11 products

Cyclone® V SX SoC FPGA
Cyclone® V GT FPGA
Stratix® V GX FPGA
Stratix® V GT FPGA
Cyclone® V GX FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Arria® V GT FPGA

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