Article ID: 000085407 Content Type: Troubleshooting Last Reviewed: 12/15/2014

hotrst_exit Signal Inactive in Soft Reset Controller for Cyclone V Hard IP for PCI Express IP Core

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

The hotrst_exit signal is not asserted when the LTSSM exits the hot reset state when you use the soft reset controller to reset the Cyclone V Hard IP for PCI Express IP Core.

Resolution

No workaround is required. The timing shown in the figure, Hard IP for PCI Express and Application Logic Reset Sequence, is still correct.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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