Article ID: 000085284 Content Type: Troubleshooting Last Reviewed: 09/11/2012

What are the effects of slew rate control for MAX 7000AE and 3000A devices?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description MAX® 7000AE and 3000A devices offer a slow slew rate feature that allows you to select either a normal slew rate for fastest performance or a slow slew rate to reduce board-level signal integrity issues.

A signal output's slew rates vary significantly based on load conditions. Altera's input/output buffer information specification (IBIS) models provide the necessary information to determine how the board's transmission line effects will require slowing the slew rate.

Table 1 shows slew rates measured for both rising and falling edges under the following conditions:

    - Single output transition
    - From 10 to 90% of the output voltage swing
    - Under a 35-pF non-terminated load
    - Room temperature
    - Nominal VCC
          Table 1. MAX 7000AE and 3000A Slew Rates 
          VCCIO (V)Normal Slew Rate (V/ns)Slow Slew Rate (V/ns)
          3.31.31.2
          2.510.9

           

          Note: The effect of slew rate control becomes more dramatic when more outputs are switching. As such, the slew rate control has a significant effect on reducing ground bounce and VCC sag effects of adjacent switching signals.

          The slow slew rate logic synthesis option can be turned on and off globally in the MAX PLUS® II software using the following steps:

          1. Choose Global Project Logic Synthesis (Assign menu).
          2. Select Define Synthesis Style (Global Project Logic Synthesis box).
          3. Turn Slow Slew Rate on or off.
          4. Choose OK twice.

            Related Products

            This article applies to 1 products

            MAX® 7000A CPLD

            Disclaimer

            1

            All postings and use of the content on this site are subject to Intel.com Terms of Use.