The Quartus® II software version 8.0 does not support the generation of EDA simulation netlists for Stratix® IV device designs with transceiver blocks.
To prevent this error, turn off EDA simulation netlist generation as follows:
On the Assignments menu, choose Settings.
Under EDA Tool Settings, choose Simulation.
Click More Settings and set Generate netlist for functional simulation only to Off.
To simulate your design, use the ALTGX.vhd or the ALTGX.v file for functional simulation along with the Quartus II version 8.0 simulation libraries.