Article ID: 000085196 Content Type: Troubleshooting Last Reviewed: 03/25/2013

Why does my simple dual-port memory not function correctly in RTL simulation?

Environment

  • Quartus® II Subscription Edition
  • Simulation
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® II software version 11.1 and later, the altsyncram simulation model incorrectly delays the output data by one extra clock cycle when reading from a simple dual-port memory implemented using MLAB resources. This issue occurs when the read-during-write option is set to Old data.

    Resolution

    A patch is available to fix this problem in the Quartus II software version 11.1 SP2. Download and install patch 2.32 from the appropriate link below:

    This problem is fixed beginning with the Quartus II software version 12.0 SP1.

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices