Article ID: 000085096 Content Type: Troubleshooting Last Reviewed: 11/06/2014

What is the bit position of the transmitted serial data (tx_out) generated from the Cyclone III device altlvds transmitter with regards to the rising edge of the transmitter clock (tx_outclock)?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The bit position of the tx_out generated from the Cyclone® III device altlvds transmitter with regards to the rising edge of tx_outclock is deterministic. Perform timing simulation to determine the bit position of tx_out with regard to the rising edge of tx_outclock.

Functional simulation will not yield accurate results of the tx_out bit position with respect to the tx_outclock, you need to rely on timing simulation to have actual device behavior and bit position.

Related Products

This article applies to 1 products

Cyclone® III FPGAs

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