Article ID: 000085088 Content Type: Troubleshooting Last Reviewed: 09/06/2012

Why do the Stratix® nIO_PULLUP, PORSEL, and VCCSEL pins only partially pull up to VCC when using an external pull-up resistor?


Description The reason the nIO_PULLUP, PORSEL, and VCCSEL pins are only partially pulling up to VCCIO is because there are internal 2.5kohm pull-down resistors always active on these pins. Therefore you need to use a 1kohm pull-up resistor to successfully pull up the pin above the input threshold voltage (VIH).

The nIO_PULLUP, PORSEL, and VCCSEL pins are powered by VCCINT to remove any dependence on VCCIO. Therefore the VIH for nIO_PULLUP, PORSEL, and VCCSEL input buffers is 1/2 of VCCINT or typically 0.75V. Using a 1kohm pull-up resistor is sufficient to pull the pin high for all supported VCCIO voltage levels.

The pin definitions section of the Pin Tables for the Stratix device family correctly report this behavior.

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Stratix® FPGAs



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