Description
The M20K RAM is the only option for Clock Crossing Bridge IP implementation, but you are able to instruct the Quartus® Prime software to use MLAB for the Clock Crossing Bridge IP implementation by the following instructions shown below
altera_avalon_dc_fifo.v@Line 152:
From: (* ramstyle="no_rw_check" *) reg [PAYLOAD_WIDTH - 1 : 0] mem [DEPTH - 1 : 0];
To:(* ramstyle="no_rw_check, MLAB" *) reg [PAYLOAD_WIDTH - 1 : 0] mem [DEPTH - 1 : 0];
Resolution
The M20K and MLAB options will be added in the future release of the Quartus® Prime software.