Article ID: 000084872 Content Type: Troubleshooting Last Reviewed: 05/13/2014

RapidIO II IP Core Might Declare Loss of Scrambler Synchronization If Link Partner Has Different Reference Clock Source

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

If the RapidIO II IP core and its RapidIO link partner have independent reference clock sources, the RapidIO II IP core declares a scrambler synchronization error by setting bit [14] of the Port 0 Error Detect CSR at offset 0x340, around the time of the first clock compensation sequence.

Resolution

This issue has no workaround.

This issue is fixed in version 13.1 Update 2 of the RapidIO II MegaCore function.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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