Article ID: 000084841 Content Type: Troubleshooting Last Reviewed: 11/21/2011

Incorrect Simulation Models Created for Deinterlacer and Frame Buffer

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

The Quartus II software may create incorrect functional simulation models for the Deinterlacer and Frame Buffer MegaCore functions.

This issue affects configurations that use a different clock domain for the Avalon Memory-Mapped (Avalon-MM) master interfaces.

The IP functional simulation models generated with the MegaWizard Plug-in may reset in an incorrect state. This issue may also affect simulation models generated with SOPC Builder.

Resolution

If possible, release the reset signals for the Avalon-MM interface ports before the reset signal for the MegaCore function. Alternatively, repeat the generation until the wizard produces a valid .vo or .vho file.

This issue will be fixed in a future version of the Video and Image Processing Suite.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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