Article ID: 000084822 Content Type: Troubleshooting Last Reviewed: 09/11/2012

(# WARNING[1]: <file name>(): No default binding for component: "scfifo". (Generic "maximize_speed" is not on the entity)

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description This warning message may occur when a MegaWizard®-generated DCFIFO design from the Quartus® II software version 4.0 is compiled in the Modelsim® simulator.

If you choose Yes (Best speed) under Output register option for devices with fully synchronous RAM on page 7 of the MegaWizard when generating the FIFO, the ModelSim software issues the compilation warning.

To avoid this warning message with the Quartus II software version 4.0, comment out the maximize_speed and optimize_for_speed parameters/generics in the MegaWizard-generated file. In addition, create and define a value for lpm_widthu for the SCFIFO instance.

Here is an example of modified code inside a VHDL MegaWizard-generated output file:

COMPONENT  scfifo

GENERIC 

(

ALLOW_RWCYCLE_WHEN_FULL: STRING := "OFF";

ALMOST_EMPTY_VALUE: NATURAL := 0;

ALMOST_FULL_VALUE: NATURAL := 0;

LPM_NUMWORDS: NATURAL;

LPM_SHOWAHEAD: STRING := "OFF";

lpm_width: NATURAL;

lpm_widthu: NATURAL; -- Altera edit

--MAXIMIZE_SPEED: NATURAL := 5; -- Altera edit

--OPTIMIZE_FOR_SPEED: NATURAL := 5; -- Altera edit

OVERFLOW_CHECKING: STRING := "ON";

UNDERFLOW_CHECKING: STRING := "ON";

USE_EAB: STRING := "ON";

lpm_type: STRING := "scfifo"

);



and



scfifo14 :  scfifo

  GENERIC MAP (

LPM_NUMWORDS => 3,

LPM_SHOWAHEAD => "OFF",

lpm_width => 32,

lpm_widthu => 2, -- Altera edit

OVERFLOW_CHECKING => "ON",

UNDERFLOW_CHECKING => "ON",

USE_EAB => "OFF)

This problem has been fixed in the Quartus II software version 4.0 SP1.

Related Products

This article applies to 1 products

Stratix® FPGAs

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