How do I instantiate 74-series macrofunctions in VHDL? (MAX PLUS® II)

Since VHDL does not allow function names or port names beginning with a number, they are preceded by a_ in the component declaration. Refer to the following example of the nand function (7400):

LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY altera;
USE altera.maxplus2.ALL;

ENTITY my_nand IS

PORT
(
my_in0 : IN STD_LOGIC;
my_in1 : IN STD_LOGIC;
my_out : OUT STD_LOGIC
);

END my_nand;

ARCHITECTURE behavior OF my_nand IS

BEGIN

u1: a_7400 
PORT MAP ( a_2 => my_in0, 
   a_3 => my_in1,
   a_1 => my_out);
END behavior;