Article ID: 000084724 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Arria GX Pin Connection Guidelines: Known Issues

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Issue 10001789:  Version 1.0

The recommended connection guideline for DCLK is incorrectly stated as "In PPA mode, DCLK should be tied to VCC to prevent this pin from floating." This should read "In PPA mode, DCLK should be tied to VCC through a 10K resistor to prevent this pin from floating."

Resolution

Resolved issues:

Issue 10001967: Version 1.0

The Pin Connection Guidelines incorrectly show that RUP4, RDN4, RUP7 and RDN7 are available for the Arria® GX device family. 

Arria GX devices do not support On-Chip termination with calibration.

Related Products

This article applies to 1 products

Arria® GX FPGA

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.