Article ID: 000084561 Content Type: Troubleshooting Last Reviewed: 11/23/2015

HMC Controller IP Core Might Have Violation of set_max_skew Constraint

Environment

    Intel® Quartus® Prime Pro Edition
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Critical Issue

Description

Compiling the HMC Controller IP core might cause a maximum allowed skew violation warning. In most cases, you can ignore this warning. However, in the following cases, the violation can cause individual transceiver channels to complete the reset process at different times:

  • In full-width variations, if the violation is in the skew between transceiver channels 7 and 8.
  • In full-width variations, if the violation is in the skew between transceiver channels 8 and 9.
  • In half-width variations, if the violation is in the skew between transceiver channels 3 and 4.
  • In half-width variations, if the violation is in the skew between transceiver channels 4 and 5.

This issue could affect all variations of the Hybrid Memory Cube Controller IP core. It is most likely to affect full-width variations configured with a data rate of 12.5 Gbps.

Resolution

This issue has no workaround. However, you can compile with different seeds to achieve different place and route results. If you run multiple compilations with different seeds, one or more of the compilation runs might provide a placement that does not violate the skew requirement.

This issue is fixed in version 15.1 of the Hybrid Memory Cube Controller IP core.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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