Article ID: 000084443 Content Type: Error Messages Last Reviewed: 04/22/2013

Internal Error: Sub-system: MEM, File: /quartus/ccl/mem/mem_segment.cpp, Line: 766

Environment

    Quartus® II Subscription Edition
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Description

Due to a problem in the Quartus® II software version 11.0 SP1, this error may be seen during Analysis & Synthesis when you compile a design targeting a Stratix® IV GX device.

Resolution

To work around, turn off timing-driven synthesis by following these steps:

  1. Open the Settings dialog box by selecting Settings on the Quartus II Assignments menu.
  2. Select the categor Analysis & Synthesis Settings
  3. Turn off the option Timing-Driven Synthesis in the Analysis & Synthesis Settings page

This problem is scheduled to be fixed in a future version of the Quartus II software.

Related Products

This article applies to 3 products

Stratix® IV GX FPGA
Stratix® IV GT FPGA
Stratix® IV E FPGA

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