Article ID: 000084412 Content Type: Troubleshooting Last Reviewed: 09/11/2012

What is the total combine page size of the Avalon to PCI Express address translation table that can be supported by the IP Compiler for PCI Express in SOPC and Qsys?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

For SOPC Builder design, the total combine size of the address pages that can be supported is 2 Gigabytes.

For Qsys design, the total combine size of the address pages that can be supported is 4 Gigabytes.

Related Products

This article applies to 1 products

Stratix® IV GX FPGA

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