The 25.175-MHz crystal oscillator drives the global clock input on the EPM7128S device (pin 83) and the global clock input on the EPF10K20 device (pin 91). This connection is hard-wired, so these pins must be configured as "dummy" clock signals if they should be ignored in your design. To configure a dummy clock signal, declare a new input and assign it directly to these pins (pin 83 in the EPM7128S device and pin 91 in the EPF10K20 device). These inputs should not be connected to any logic in the design, which causes the MAX PLUS® II software to tri-state the pins.
If you are using just one clock (other than the on-board clock), simply declare this clock signal and the MAX PLUS II software automatically places this signal on the second global clock pin.
If your design needs a second clock, use a dedicated input pin (EPF10K20 device only) or a standard I/O pin. To do this, assign both clocks manually. One clock should be assigned to the unused global clock input pin (pin 2 on the EPM7128S device and pin 211 on the EPF10K20 device), and the other can be assigned to any unused dedicated input (FLEX® 10K device) or a regular I/O pin. Turn off the Automatic Global Clock option in the Global Project Logic Synthesis dialog box to route the clock through an I/O pin. Note that using a standard I/O pin for clock signals with large fan out may introduce additional skew.