Due to a problem in the Quartus® II software version 12.0 and later, you may see this warning message during compilation if you use a wildcard expression to assign nodes to a LogicLock™ region. These warning messages are generated during Analysis & Synthesis, the Fitter, and the TimeQuest timing analyzer. Similar warnings may be generated for LL_PRIORITY assignments that use wildcard expressions. These warnings are incorrect as wildcard expressions are supported for LogicLock region assignments.
These warnings may safely be ignored. LogicLock region assignments using wildcard expressions are applied during compilation.
This problem is fixed beginning with the Quartus II software version 12.0 SP2.