Article ID: 000084101 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why can't I generate a DQS phase shift other than 90 degrees in Stratix devices using Quartus II version 4.2?


Description Even if you choose a non-ninety degree DQS phase shift in the altdqs MegaWizard, Quartus II version 4.2 will incorrectly create a Megafunction output file that is set to a 90 degree DQS phase shift. This only occurs when using the altdqs Megafunction and users of Alter's memory controller data path IP are not affected by this issue since the Altera IP does not utilize the altdqs function for this purpose. The impact of this issue will be low considering Altera recommends all customers utilize the Altera memory controller IP Tool Bench to generate the data path interface even if the Altera memory controller IP core will not be used.

If you already have a design which uses altdqs and you can not use the IP toolbench, you can work around this issue by manually adjusting the phase shift (twice) in the megafunction output file. The following is an example of the changes that would be made to achieve a 72 degree phase shift for a sample design:

strx_dll1.phase_shift = "72"
strx_io2.sim_dll_phase_shift = "72"
This will be fixed in the next revision of Quartus II 5.0.

Related Products

This article applies to 1 products

Stratix® FPGAs