Due to a problem in the Quartus® II software versions 10.1 SP1 and earlier, you may see inverted LVDS_E_3R output signals in Cyclone® III or Cyclone IV devices. This may occur if NOT-gate push back is implemented on the output register and the output register is placed in the I/O element. NOT-gate push back occurs when a register has an initial high value, including when Quartus II synthesis implements an asynchronous preset using an asynchronous reset.
To work around this issue, perform one of the following:
Prevent the register from being placed in the I/O element using the
FAST_OUTPUT_REGISTERassignment as follows:
- Or, prevent the implementation of NOT-gate push back by removing the initial high value for the output register, such as by removing the asynchronous preset.
set_instance_assignment -name FAST_OUTPUT_REGISTER OFF -to <output pin name>
This problem is fixed beginning with the Quartus II software version 11.1.