Article ID: 000083581 Content Type: Troubleshooting Last Reviewed: 10/17/2014

Why does the MAX 10 device reset a few minutes after being programmed for the first time via JTAG using a SOF file?

Environment

  • Reset
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    By default, the watchdog timer option is enabled in MAX® 10 devices.

    Hence, after programming a MAX 10 device for the first time via JTAG using a SOF file, the watchdog timer begins counting until it times out, at which point the MAX 10 device will be reset.

    Resolution

    To prevent the reconfiguration watchdog timer from timing out, perform a full chip erase prior to device programming when using the MAX 10 device for the first time. This must be done only prior to initial programming.

     

    This limitation is fixed in MAX 10 production devices. For details, refer to  Errata Sheet and Guidelines for MAX 10 ES Devices (PDF).

    Related Products

    This article applies to 1 products

    Intel® MAX® 10 FPGAs

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