Description
Due to a problem in the Quartus® II software version 13.1 and earlier, the Verilog HDL synthesis attribute may not be processed correctly if you were using pragma-style attributes.
Example: output dataout /* synthesis altera_attribute="-name VIRTUAL_PIN ON" */;
Resolution
To work around this problem, use Verilog HDL 2001 style attributes.
Example: (* altera_attribute = "-name VIRTUAL_PIN ON" *) output dataout;
This problem is scheduled to be fixed in a future version of the Quartus II software.