Article ID: 000083456 Content Type: Troubleshooting Last Reviewed: 07/18/2016

Qsys Generates Vid_Std Signal Even When Option is Turned Off

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

Qsys always generates the vid_std signal for the Clocked Video Input II IP core, even when you do not turn on the Use vid_std bus option.

The vid_std signal is sampled and stored in the Standard register of the IP core to be read back for software control.

Resolution

If you do not need this signal, leave the input disconnected at the instancing of the Qsys system.

This issue will be fixed in a future version of the Clocked Video Input II IP core.

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This article applies to 1 products

Intel® Programmable Devices

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