Article ID: 000083438 Content Type: Product Information & Documentation Last Reviewed: 02/13/2018

How often should I reset the watchdog timer when using the Remote System Upgrade Circuitry in Max 10 devices?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Remote Update Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    If the application does not constantly reset the watchdog timer before time expires, the remote system upgrade circuitry generates a time-out signal, updates the status register, and triggers the loading of the factory configuration image.

    Resolution

    When the watchdog timer is enabled, the application must constantly reset the watchdog timer, before the wd_timeout_value register value. 

    Related Products

    This article applies to 1 products

    Intel® MAX® 10 FPGAs

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