Why do I get hundreds of warnings during simulation of byte-writes to internal memory in Qsys VHDL simulation?

When running a Modelsim VHDL simulation of a Qsys system, and performing 8-bit or 16-bit writes, the following warning may appear often in the simulation tool console:

Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).

In the case of a byte or halfword write, it is safe to ignore this warning, as the unused byte lanes of the transaction are discarded. To mask these warnings, the following command can be run in the Modelsim console before starting simulation:

set StdArithNoWarnings 1

An enhancement to the simulation models to make this enhancement unnecessary is planned for a later version of the Quartus® II tool.