RapidIO II IP Core Ignores Control Symbol Immediately Following Very Short IDLE2 Sequence

If the RapidIO II IP core receives a very short IDLE2 sequence, the control symbol immediately following the IDLE2 sequence is ignored.

This issue affects the following variations:

• 1x variations when receiving an IDLE2 sequence of one, two, or three characters
• 2x variations when receiving an IDLE2 sequence of one character per lane

The impact of this issue depends on the type of control symbol that the RapidIO II IP core ignores. For example, in the most commmon case, the control symbol that the IP core ignores is a start-of-packet symbol. In this case, the IP core ignores the whole packet, and then perceives the following packet to have an unexpected ackID. In response to the unexpected ackID, the RapidIO II IP core sends a packet-not-accepted control symbol. The error recovery process then forces the link partner to resend the missed packet, and normal operation resumes.

To avoid this issue, ensure that the RapidIO link partner does not generate short IDLE2 sequences that trigger the issue. For example, the Altera RapidIO II IP core does not generate such short IDLE2 sequences, and the IDT CPS-1848 switch does not generate such short IDLE2 sequences when operating in 2x or 4x mode.

This issue is fixed in version 13.0 of the RapidIO II MegaCore function.