Critical Issue
Description
In the Synopsys Design Constraints File (.sdc)
for the CPRI MegaCore function, the clk_ex_delay clock
period is specified incorrectly for some CPRI MegaCore function variations.
This issue affects all CPRI MegaCore function variations that use the default .sdc script. In the affected configurations, extended Rx delay measurement is inaccurate.
Resolution
Appropriate Clock Period Value
Edit the .sdc with the correct values for an
M/N ratio of 128/127 or 64/63. In the create_clock command
for the clk_ex_delay clock, modify the -period parameter to
the appropriate clock period value shown in table below.
| CPRI Line Rate (Mbps) | System Clock (MHz) | Extended Rx Delay Measurement Clock (clk_ex_delay) | |||||
| M/N = 128/127 | M/N = 64/63 | ||||||
| Frequency (MHz) | Clock Period (ns) | Duty Cycle (ns) | Frequency (MHz) | Clock Period (ns) | Duty Cycle (ns) | ||
| 614.4 | 15.36 | 15.24 | 65.617 | 32.809 | 15.12 | 66.138 | 33.069 |
| 1228.8 | 30.72 | 30.48 | 32.808 | 16.404 | 30.24 | 33.069 | 16.535 |
| 2457.6 | 61.44 | 60.96 | 16.404 | 8.202 | 60.48 | 16.534 | 8.267 |
| 3072.0 | 76.80 | 76.20 | 13.123 | 6.562 | 75.60 | 13.228 | 6.614 |
| 4915.2 | 122.88 | 121.92 | 8.202 | 4.101 | 120.96 | 8.267 | 4.134 |
| 6144.0 | 153.60 | 152.40 | 6.562 | 3.281 | 151.20 | 6.614 | 3.307 |
This issue is fixed in version 10.1 of the CPRI MegaCore function.