Article ID: 000083314 Content Type: Troubleshooting Last Reviewed: 02/24/2014

What is the state of HPS I/O pins in Cyclone V SoC and Arria V SoC device pins during cold and warm resets?

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Description Hard Processor System (HPS) I/O pins on Cyclone® V SoC and Arria® V SoC devices are tristated during cold reset.  At warm reset, these I/O pins retain their configuration.

Related Products

This article applies to 1 products

Cyclone® V SE SoC FPGA

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