Article ID: 000083307 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why are OCT nodes listed at No Clock section in the Check Timing report in the TimeQuest timing analyzer?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

In the Quartus® II software, the Check Timing report in the TimeQuest Timing analyzer may list the following on-chip termination (OCT) nodes in the No Clock section for designs targeting Stratix® IV devices and using DDR3 SDRAM Controller MegaCore®  supporting UniPHY:

<hierarchical path>|altera_mem_if_oct_stratixiv:oct0|wire_sd1a_terminationcontrol[0]
<hierarchical path>|altera_mem_if_oct_stratixiv:oct0|wire_sd1a_serializerenableout[0]
Resolution

These warnings can safely be ignored.

Related Products

This article applies to 3 products

Stratix® IV GX FPGA
Stratix® IV E FPGA
Stratix® IV GT FPGA

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