Description
You might get this error when you synthesize the ALTDLL Intel® FPGA IP in Stratix® V FPGAs with the Quartus® II software version 13.1 if you turn on Instantiate dll_offset_ctrl block and Set statically to options for DLL Phase Offset Control A or DLL Phase Offset Control B block.
Resolution
To work around this error, follow these steps:
- Modify the value of the dll_ctr_a_wys.use_offset parameter from true to false in the <DLL variation name>.v file.
- Re-run the synthesis.
This problem is fixed starting with the Quartus® II software version 14.1.