Article ID: 000082878 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does my Avalon™ DMA controller miss data words when performing Avalon streaming transfers?

Environment

  • DMA
  • Streaming
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    This issue has been fixed in SOPC Builder version 4.0 SP1 (included in Quartus® II 4.0 SP1).  This issue only affects designs created with SOPC Builder version 4.0 and earlier.  

    When using the Avalon DMA controller in the Nios embedded processor development kit to transfer data from a streaming source to a destination in memory it is possible for the DMA controller to omit writing some of the source words to the destination memory. This behavior will be noticed if incorrect words or gaps in data appear in the destination memory within the range that the DMA is copying data to. This problem can be avoided by setting the DMA controller FIFO to be implemented in LEs instead of ESBs. You can implement the FIFO in LEs by double-clicking on the DMA instance in the SOPC Builder and selecting "Implement in LEs" in the wizard.

    Related Products

    This article applies to 2 products

    Excalibur™
    Cyclone® FPGAs

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