Article ID: 000082667 Content Type: Error Messages Last Reviewed: 12/01/2024

Error: rs232_0: The input clock frequency must be known at generation time.

Environment

    Intel® Quartus® Prime Standard Edition
    RS232 UART Intel® FPGA IP
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Description

Due to a problem in the Quartus® Prime Standard Edition Software v18.0 and earlier, you may see this error message when generating the HDL design file for an RS232 UART IP in IP Parameter Editor.

Resolution

To work around this problem, add an RS232 UART instance from IP Catalog in Platform Designer.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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