Article ID: 000082656 Content Type: Troubleshooting Last Reviewed: 07/03/2015

Why do I see a low restricted fmax when using a floating-point adder in Arria 10 DSP block, either with OpenCL or DSP Advanced Blockset?

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

This problem affects designs targeting Arria 10 DSP blocks’ floating-point mode and when you implement the floating-point adder in DSP blocks. The specification for the adder when fully pipelined is to operate at over 450MHz. However, in the Quartus II software v15.0, you see a restricted fMAX of 298.51 MHz for this module.

Resolution

This problem is scheduled to be fixed in a future version of the Quartus II software.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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