Article ID: 000082608 Content Type: Product Information & Documentation Last Reviewed: 07/02/2014

How do I build an Altera DS-5 project without semi-hosting?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in Altera SOS EDS version 13.0 and 13.1, the  Assembler code required to build a non semi-hosted application is missing.

    Resolution

    To work around this problem follow the steps below to download the required Assembler file and then update your linker script to disable semi-hosting.

    An example Makefile and Linker script based on the Altera-SoCFPGA-HardwareLib-GNU.tar.gz example from SOC EDS 13.0Sp1 can be downloaded from the link below: ExampleFiles_nonSemiHosted.zip (altera-socfpga.ld, Makefile, reset.s)

    Steps to enable non-semi hosted application using Altera Example as template

    1. Download reset.o:ExampleFiles_nonSemiHosted.zip
    2. Copy / backup your existing Altera linker script altera-socfpga-hosted.ld
    3. Change the compile flag
      Before: -lcs3hosted
      After: -lcs3unhosted:  GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3arm)
    4. Comment out or remove the following code sections:
      /* Enable arm semihosting */
      EXTERN(__auto_semihosting) /* force exit to be picked up in a hosted or os environment */
      EXTERN (exit atexit)

    5. Update Makefile to compile reset.o and point to updated Linker Script from steps 2-4
      #Assembler Flags
      AFLAGS := -g -O0 -mfloat-abi=soft -march=armv7-a -mtune=cortex-a9 -mcpu=cortex-a9 -x assembler
      #Assembler source files
      A_SRC := reset.s
      #Original Linker script
      #LINKER_SCRIPT := altera-socfpga_hosted.ld
      #Link to updated linker script for non-semihosted
      LINKER_SCRIPT := altera-socfpga.ld
      #Clause to compile reset.o
      reset.o:
        -c reset.s -o reset.o
      #Updated linker line to add dependency for reset.o
      : reset.o
        -T reset.o -o
        -d > .objdump
        > .map

    Note:  When editing Makefiles ensure correct Tab and Space rules are followed
     

    This problem fixed beginning with the SOC EDS version 14.0

    Related Products

    This article applies to 5 products

    Cyclone® V SE SoC FPGA
    Arria® V ST SoC FPGA
    Arria® V SX SoC FPGA
    Cyclone® V ST SoC FPGA
    Cyclone® V SX SoC FPGA

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