Article ID: 000082514 Content Type: Troubleshooting Last Reviewed: 07/02/2013

10GBASE-R PHY Setup Time Violation in Arria V GZ Devices with 1588

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

The 10GBASE-R PHY IP Core has a hold time violation in the Arria V Ethernet MAC example design. This timing violation occurs for the fast model.

Resolution

This issue is fixed in version 13.0 of the Quartus II software.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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