Article ID: 000082322 Content Type: Troubleshooting Last Reviewed: 02/20/2017

SDC contstraints ignored when using LE as storage with DCFIFO IP core

Environment

    Intel® Quartus® Prime Pro Edition
    Intel® Quartus® Prime Standard Edition
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Critical Issue

Description

When you use the DCFIFO IP core and select LE as the storage implementation, the autogenerated Synopsys Design Constraint (SDC) template is not valid. SDC constraints are ignored and the design is not constrained properly.

This affects the DCFIFO IP core when you select LE as the storage implementation.

Resolution

Modify the generated SDC template with the corresponding graycounter and synchronizer naming.

Related Products

This article applies to 1 products

Intel® Arria® 10 FPGAs and SoC FPGAs

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