Article ID: 000082020 Content Type: Troubleshooting Last Reviewed: 12/01/2012

Timing Closure for Soft LPDDR2 Interfaces May Not be Robust

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    This problem affects LPDDR2 products.

    Soft LPDDR2 interfaces targeting Arria V or Cyclone V devices may have difficulty achieving timing closure.

    Resolution

    The workaround for this issue is to turn on physical synthesis with high effort, or try a different fitter seed.

    This issue will be fixed in a future release.

    Related Products

    This article applies to 2 products

    Cyclone® V FPGAs and SoC FPGAs
    Arria® V FPGAs and SoC FPGAs

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