Article ID: 000081945 Content Type: Product Information & Documentation Last Reviewed: 04/15/2015

How can I use VSEC registers in my Hard IP for PCI Express?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The following is a framework for implementation of VSEC register usage.

Resolution

1) Set up your VSEC memory in the FPGA fabric using Internal RAM.

2) In the Altera® Vendor-Specific (VSEC) Extended Capability Header (offset 0x200), set bits [31:20] to 0x400 (reserved space for the HardIP, other reserved locations are also available)

3) Decode the TLPs that target the range 0x400 plus ( ) the size of memory needed for new VSEC capability

4) Ensure VSEC memory is decoded and encoded through application layer logic

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This article applies to 16 products

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