Article ID: 000081775 Content Type: Troubleshooting Last Reviewed: 09/11/2012

What is the proper layout for RREFB pins in Stratix GX devices?

Environment

  • Stratix® GX FPGA
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description Each RREFB pin requires a 2-kW surface mount resistor to the ground plane in Stratix® GX devices to keep noise sources away from this connection. The DC signal on this pin has to be as clean as possible since it is being used as an internal reference. Altera recommends using the smallest resistor package type as possible to minimize inductance.

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