Article ID: 000081771 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Can the PCIe® nPERST PIN recieve LVTTL signal regardless of VCCIO voltage ?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description The dedicated nPERST pins may be driven by 3.3V regardless of the VCCIO voltage level of the bank without a level translator as long as the input signal meets the LVTTL VIH/VIL specification, and as long as it meets the overshoot specifications for 100% operation as defined in the "DC and Switching Characteristics for Stratix V Devices." chapter of the Stratix V handbook.

Related Products

This article applies to 1 products

Stratix® V GX FPGA

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.