Article ID: 000081760 Content Type: Troubleshooting Last Reviewed: 09/02/2014

Are there any potential issues when releasing the receiver from reset when receiving a word alignment pattern on Altera transceiver devices?



Yes, you could see incorrect byte ordering or word alignment if all of the following conditions are true:

1. Word Aligner is in manual alignment mode

2. Byte Ordering Block is enabled

3. The syncstatus signal from the Word Aligner is used to trigger the byte ordering function

4. The word alignement pattern and byte ordering pattern are the same

5. The word aligner/byte ordering pattern is received by the transceiver before rx_digitalreset is released

Resolution If all the above conditions are true, you may see a byte ordering error in simulation and/or hardware. The workaround for this issue is to use the rx_patternalign signal after the reset sequence is complete to force a new word alignment and in turn a new byte ordering operation.

Related Products

This article applies to 2 products

Stratix® IV FPGAs
Stratix® IV GX FPGA