RapidIO User Guide Does Not Clarify That .sdc File Must Be Modified Manually in Case of Multiple RapidIO IP Core Instances

If you instantiate multiple RapidIO IP cores in your design, you must modify the Synopsys Design Constraints File (.sdc) to repeat the create_generated_clock statements for each IP core instance. If you do not do this, the source and destination clocks each have multiple matches; the rxclk and clk_dev_by_2 filters match the relevant clocks in all of the IP core instances.

However, the RapidIO MegaCore Function User Guide does not include this information.

This issue has no workaround. To work around the underlying issue, modify your .sdc file manually.

This issue is fixed in version 14.0 of the RapidIO MegaCore Function User Guide.