Article ID: 000081553 Content Type: Product Information & Documentation Last Reviewed: 01/01/2015

How do I calculate the frequency, phase shift and duty cycle for clocking ALTLVDS soft SERDES using external PLL mode?

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Description

Altera® devices have two types of implementation for SERDES blocks - hard SERDES and soft SERDES (built from logic cells).  This document will discuss how to calculate the frequency, phase shift, and duty cycle for each of the clocks needed for the external PLL interface with soft SERDES. By selecting external PLL mode, you must set the PLL parameters, but you can access other features of the PLL such as clock switchover, PLL reconfiguration, and other output clocks which would otherwise not be available when using the internal PLL.

Download this How-To document to learn how you can calculate the frequency, phase shift, and duty cycle for each of the clocks used for external PLL mode with soft SERDES.

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